The present invention relates to a method and/or architecture for implementing microcontrollers generally and, more particularly, to a method and/or architecture for a reset scheme for microcontrollers.
A number of electronic devices generally operate in two modes, (i) active or xe2x80x9cnormalxe2x80x9d operation mode, and (ii) suspend, low-power, or xe2x80x9csleepxe2x80x9d mode. Microcontroller circuits are one example of such a device. Conventional microcontrollers may include several types of resets including (i) a power-on initialization reset, (ii) a manual, user-selected reset, and (iii) a single voltage-drop responsive reset. The voltage-drop responsive reset is intended to reset the circuit whenever the power supply voltage drops below a predetermined level (e.g., a brown out event). The predetermined voltage level for resetting is also referred to as the trip point. Conventional reset designs implement one of two types of voltage-drop responsive resets (i) precision resets or (ii) low-power resets. When in the active mode, the reset threshold voltage level needs to have a precise and rapid response in order to maintain data integrity and proper microcontroller operation. When in the suspend mode, data integrity needs to be maintained with very low power dissipation. The reset threshold voltage level can be lower and less precise in the suspend mode than when the microcontroller is in the active mode.
Precision resets operate at precisely determined threshold voltages and respond to rapid supply voltage drops. However, precision resets consume too much power to be practical in the suspend mode. Low-power resets do not provide a robust active mode reset because of (i) lack of trip point precision and (ii) inadequate response speed.
Conventional microcontroller reset circuits using a single reset scheme are not able to support microcontroller data integrity and power consumption requirements for both active and suspend modes. It would be desirable to provide a reset scheme that may support the conflicting needs of (i) precise trip points, (ii) fast response for an active mode operation and/or (iii) low-power consumption for suspend mode support. Such a reset scheme is generally desirable for Universal Serial Bus microcontroller applications and other applications with similar needs.
The present invention concerns an apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a reset when the apparatus is in a first operational mode. The second circuit may be configured to generate the reset when the apparatus is in a second operational mode.
The objects, features and advantages of the present invention include a method and/or architecture that may provide a reset signal that may (i) be completely internal to a circuit, (ii) not require any external components or pins, (iii) maintain data integrity with a precise low-voltage trip point when in an active mode, and/or (iv) implement a low power consumption trip point in suspend mode.